Yushi Zhou and Fei Yuan
This editorial examines design techniques for high-speed serial data links over wire channels. The state-of-theart of serial links over wire channels is briefly studied. The imperfections of wire channels at high frequencies and their effect on multi-Gbps serial links are examined. It is followed with a close examination of modulation schemes effective in combating the effect of the finite bandwidth of wire channels. Channel equalization, both pre-emphasis and post-equalization, are investigated with an emphasis on adaptive decision feedback equalization. Challenges and opportunities in combating ISI are explored.
இந்தக் கட்டுரையைப் பகிரவும்
English 
Spanish 
Chinese 
Russian 
German 
French 
Japanese 
Portuguese 
Hindi 